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卷2Intel手册-Chapter2

发表于 2015 年 10 月 30 日

Chapter  2     INSTRUCTION FORMAT   指令格式
This chapter describes the instruction format for all Intel 64 and IA-32 processors. The instruction format for
protected mode, real-address mode and virtual-8086 mode is described in Section 2.1. Increments provided for IA-
32e mode and its sub-modes are described in Section 2.2.
Chapter 2描述了和INTEL 64位和32位处理器有关的指令格式,关于保护模式,实模式和虚拟8086模式的指令格式在2.1节中被描述。IA32模式和它的子模式,在2.2节中描述。
2.1 INSTRUCTION FORMAT FOR PROTECTED MODE, REAL-ADDRESS MODE,AND VIRTUAL-8086 MODE
保护模式,实模式和虚拟8086模式的指令组成
The Intel 64 and IA-32 architectures instruction encodings are subsets of the format shown in Figure 2-1. Instructions
consist of optional instruction prefixes (in any order), primary opcode bytes (up to three bytes), an
addressing-form specifier (if required) consisting of the ModR/M byte and sometimes the SIB (Scale-Index-Base)
byte, a displacement (if required), and an immediate data field (if required).
64位和32位体系中,有关指令组成的各个字段,显示在了下面的Figure 2-1图中,指令是由前缀,主要操作码,由ModR/M或者SIB字节的分隔符":"指定的地址形式,偏移量和立即数组成,这些选项是可选的

2.1.1    Instruction Prefixes                  指令前缀
Instruction prefixes are divided into four groups, each with a set of allowable prefix codes. For each instruction, it
is only useful to include up to one prefix code from each of the four groups (Groups 1, 2, 3, 4). Groups 1 through 4
may be placed in any order relative to each other.
指令前缀被分成了四组,每组都有一些前缀编码,对于每条指令,只有包含这四组中的某个前缀编码才是有用的,第一组到第四组可以彼此放在任何顺序
• Group 1
— Lock and repeat prefixes:                                  锁和重复前缀
• LOCK prefix is encoded using F0H                 锁前缀是F0H
• REPNE/REPNZ prefix is encoded using F2H. Repeat-Not-Zero prefix applies only to string and
input/output instructions. (F2H is also used as a mandatory prefix for some instructions)
REPNE/REPNZ是十六进制F2H,该前缀仅仅被用作字符串和I/O指令中,但是有时在一些指令中,它也被用作强制前缀
REP or REPE/REPZ is encoded using F3H. The repeat prefix applies only to string and input/output instructions. F3H
is also used as a mandatory prefix for POPCNT, LZCNT and ADOX instructions.
REP/REPE/REPZ是十六进制F3H,该前缀仅仅被用作字符串和I/O指令中,F3H也被用作强制前缀在指令POPCNT
• Group 2
— Segment override prefixes:
• 2EH—CS segment override (use with any branch instruction is reserved)
• 36H—SS segment override prefix (use with any branch instruction is reserved)
• 3EH—DS segment override prefix (use with any branch instruction is reserved)
• 26H—ES segment override prefix (use with any branch instruction is reserved)
• 64H—FS segment override prefix (use with any branch instruction is reserved)
• 65H—GS segment override prefix (use with any branch instruction is reserved)
上面的段前缀使用任何分支指令都将被保留
— Branch hints:          分支提示
• 2EH—Branch not taken (used only with Jcc instructions)   仅仅在JCC指令的时候才被使用
• 3EH—Branch taken (used only with Jcc instructions)           仅仅在JCC指令的时候才被使用
• Group 3
• Operand-size override prefix is encoded using 66H (66H is also used as a mandatory prefix for some
instructions).
操作数大小前缀是十六进制66H
• Group 4
• 67H—Address-size override prefix
地址大小前缀
The LOCK prefix (F0H) forces an operation that ensures exclusive use of shared memory in a multiprocessor environment.
See “LOCK—Assert LOCK# Signal Prefix” in Chapter 3, “Instruction Set Reference, A-M,” for a description
of this prefix.
锁前缀强的操作是确保多处理器的共享内存强制为自己独用,关于前缀的描述,请看Chapter 3中的 “LOCK—Assert LOCK# Signal Prefix”,指令引用了A-M
Repeat prefixes (F2H, F3H) cause an instruction to be repeated for each element of a string. Use these prefixes only
with string and I/O instructions (MOVS, CMPS, SCAS, LODS, STOS, INS, and OUTS). Use of repeat prefixes and/or
undefined opcodes with other Intel 64 or IA-32 instructions is reserved; such use may cause unpredictable
behavior.
重复前缀使指令去重复字符串的字符,重复前缀仅仅被用在字符串和IO指令中(MOVS,CMPS,SCAS,LODS,STOS,INS,OUTS),重复前缀和其他未定义的操作码,在其他64位或者32位指令中是被保留的 (除了字符串和IO指令,不让用于其他指令),强制使用将会发生不可预测的行为
Some instructions may use F2H,F3H as a mandatory prefix to express distinct functionality. A mandatory prefix
generally should be placed after other optional prefixes (exception to this is discussed in Section 2.2.1, “REX
Prefixes”)
一些指令也许会使用F2,F3作为一个强制前缀,去表现它明显的功能,强制前缀一般被放在其他前缀的后面 (关于异常,将会在2.2.1节的“REX Prefixes”中讨论)
Branch hint prefixes (2EH, 3EH) allow a program to give a hint to the processor about the most likely code path for
a branch. Use these prefixes only with conditional branch instructions (Jcc). Other use of branch hint prefixes
and/or other undefined opcodes with Intel 64 or IA-32 instructions is reserved; such use may cause unpredictable
behavior.
分支提示前缀允许程序给出处理器的提示,关于更接近分支的代码路径,使用这个前缀仅仅是在固定的分支指令中(JCC), 其他情况下使用分支提示前缀或者未定义的操作码在64位或者32位指令中,将被保留,一些情况下,还会发生更糟糕的情况
The operand-size override prefix allows a program to switch between 16- and 32-bit operand sizes. Either size can
be the default; use of the prefix selects the non-default size.
操作数大小前缀允许程序选择16位或者32位大小,一个作为默认大小,使用前缀将作为非默认大小
Some SSE2/SSE3/SSSE3/SSE4 instructions and instructions using a three-byte sequence of primary opcode bytes
may use 66H as a mandatory prefix to express distinct functionality. A mandatory prefix generally should be placed
after other optional prefixes (exception to this is discussed in Section 2.2.1, “REX Prefixes”)
Other use of the 66H prefix is reserved; such use may cause unpredictable behavior.
一些SSE2/SSE3/SSE4指令使用一个主要操作码为三字节顺序的指令,也许会使用66H作为强制前缀去表达更清楚的意图,其他情况中使用66H前缀会被保留,一些情况下会发生更糟糕的情况
The address-size override prefix (67H) allows programs to switch between 16- and 32-bit addressing. Either size
can be the default; the prefix selects the non-default size. Using this prefix and/or other undefined opcodes when
operands for the instruction do not reside in memory is reserved; such use may cause unpredictable behavior.
地址大小前缀67H允许程序在16位和32位地址大小之间选择,任何一个地址大小是默认值,另一个带有前缀的将作为非默认值,当指令不在内存中的时候,使用地址大小段前缀或者未定义的操作码,都将被保留,甚至会发生更差的行为

2.1.2    Opcodes
A primary opcode can be 1, 2, or 3 bytes in length. An additional 3-bit opcode field is sometimes encoded in the
ModR/M byte. Smaller fields can be defined within the primary opcode. Such fields define the direction of operation,
size of displacements, register encoding, condition codes, or sign extension. Encoding fields used by an
opcode vary depending on the class of operation.
第一操作码可以是1,2,3字节的长度,一个额外的3比特位的操作码,有时候被编码在ModR/M字节中,更小字段能被定义为第一操作码,一些字段定义了操作数方向,偏移量大小,寄存器编码,代码环境,符号扩展,通过操作码的变化使用编码字段,取决于操作数的类型
Two-byte opcode formats for general-purpose and SIMD instructions consist of:
关于通用的两字节操作码和SIMD指令的组合:
• An escape opcode byte 0FH as the primary opcode and a second opcode byte, or
一个转义码字节F3H作为第一操作码和一个第二操作码字节
• A mandatory prefix (66H, F2H, or F3H), an escape opcode byte, and a second opcode byte (same as previous
bullet)
一个强制前缀,和一个转义码和一个第二字节操作码
For example, CVTDQ2PD consists of the following sequence: F3 0F E6. The first byte is a mandatory prefix (it is not
considered as a repeat prefix).
例如,CVTDQ2PD由F3  E6组成,F3是一个强制前缀
Three-byte opcode formats for general-purpose and SIMD instructions consist of:
普通的三字节操作码和SIMD指令由下面的组成
• An escape opcode byte 0FH as the primary opcode, plus two additional opcode bytes, or
一个转义字节码0FH作为第一操作码,外加两个操作码
• A mandatory prefix (66H, F2H, or F3H), an escape opcode byte, plus two additional opcode bytes (same as
previous bullet)
一个强制前缀和一个转义码,外加两个操作码
For example, PHADDW for XMM registers consists of the following sequence: 66 0F 38 01. The first byte is the
mandatory prefix.
例如,关于XMM寄存器的PHADDW由66 0F 38 01组成,第一个操作码是强制前缀
Valid opcode expressions are defined in Appendix A and Appendix B.
更多有效的操作码在附录A和附录B中被定义和描述
2.1.3     ModR/M and SIB Bytes
Many instructions that refer to an operand in memory have an addressing-form specifier byte (called the ModR/M
byte) following the primary opcode. The ModR/M byte contains three fields of information:
一些指令引用了内存中的操作码,这种操作码是寻址分类符后面的第一个操作码,ModR/M字节包含三个字段信息
• The mod field combines with the r/m field to form 32 possible values: eight registers and 24 addressing modes.
32值由模式区域和r/m区域组成:8位寄存器和24寻址方式
• The reg/opcode field specifies either a register number or three more bits of opcode information. The purpose
of the reg/opcode field is specified in the primary opcode.
reg/opcode字段指定了要么是一个寄存器,要么是一个3bit的操作码,reg/opcode的作用是被第一操作码指定的
• The r/m field can specify a register as an operand or it can be combined with the mod field to encode an
addressing mode. Sometimes, certain combinations of the mod field and the r/m field is used to express
opcode information for some instructions.
r/m字段指定寄存器作为一个操作数,或者它被作为mod区域去编码一个寻址方式,有时,mod字段和r/m字段加起来被用作表达一些指令码的信息
Certain encodings of the ModR/M byte require a second addressing byte (the SIB byte). The base-plus-index and
scale-plus-index forms of 32-bit addressing require the SIB byte. The SIB byte includes the following fields:
某些ModR/M字节的编码,需要SIB字节来寻址,SIB字节包含如下字段
• The scale field specifies the scale factor.                                         scale字段指定了比例因子(是386及其后继机型新增加的寻址方式中的一个术                                                                                                                             语,可以是1,2,4,8)
• The index field specifies the register number of the index register.  Index字段指定了变址寄存器寄存器编号
• The base field specifies the register number of the base register.      Base字段指定了基址寄存器的寄存器编号
See Section 2.1.5 for the encodings of the ModR/M and SIB bytes.    详细情况2.15节
2.1.4         Displacement and Immediate Bytes                                           偏移量和立即数
Some addressing forms include a displacement immediately following the ModR/M byte (or the SIB byte if one is
present). If a displacement is required; it be 1, 2, or 4 bytes.
在一些寻址方式中,ModR/M后面会跟着一个偏移量,如果存在偏移,它可以是1,2,4字节
If an instruction specifies an immediate operand, the operand always follows any displacement bytes. An immediate
operand can be 1, 2 or 4 bytes.
如果指令中指定了立即数,该立即数将总是跟在偏移量后面,立即数可以是1,2,4字节
2.1.5 Addressing-Mode Encoding of ModR/M and SIB Bytes   ModR/M和SIB字节的寻址模式
The values and corresponding addressing forms of the ModR/M and SIB bytes are shown in Table 2-1 through Table
2-3: 16-bit addressing forms specified by the ModR/M byte are in Table 2-1 and 32-bit addressing forms are in
Table 2-2. Table 2-3 shows 32-bit addressing forms specified by the SIB byte. In cases where the reg/opcode field
in the ModR/M byte represents an extended opcode, valid encodings are shown in Appendix B.
ModR/M和SIB字节的寻址方式和值被显示在Table 2-1 到 Table 2-3中,ModR/M字节的16位寻址方式被指定在Table 2-1中,其32位寻址方式显示在Table 2-2中,SIB字节的寻址方式显示在了Table 2-3中, 这种情况下ModR/M字节中的reg/opcode字段被作为扩展码,有效编码显示在了附录B中
In Table 2-1 and Table 2-2, the Effective Address column lists 32 effective addresses that can be assigned to the
first operand of an instruction by using the Mod and R/M fields of the ModR/M byte. The first 24 options provide
ways of specifying a memory location; the last eight (Mod = 11B) provide ways of specifying general-purpose, MMX
technology and XMM registers.
在Table 2-1和Table 2-2中, Effective Address这一列列举了通过ModR/M字节的Mod和R/M字段指定的指令的第一个操作数的32位有效地址,前28位提供了指定内存位置的方法,最后八位指定了通用的方式,MMX技术和XMM寄存器
The Mod and R/M columns in Table 2-1 and Table 2-2 give the binary encodings of the Mod and R/M fields required
to obtain the effective address listed in the first column. For example: see the row indicated by Mod = 11B, R/M =
000B. The row identifies the general-purpose registers EAX, AX or AL; MMX technology register MM0; or XMM
register XMM0. The register used is determined by the opcode byte and the operand-size attribute.
Table 2-1和Table 2-2 中的Mod和R/M列给出了Mod和R/M字段的二进制码,这些二进制码要求获得显示在第一列的有效地址。例如,看被标记为Mod=11B, R/M=000B这行,这行定义了普通寄存器EAX,AX,AL, MMX技术寄存器MM0, XMM寄存器XMM0,通过操作码字节和操作数大小来确定到底是哪一个寄存器
Now look at the seventh row in either table (labeled “REG =”). This row specifies the use of the 3-bit Reg/Opcode
field when the field is used to give the location of a second operand. The second operand must be a generalpurpose,
MMX technology, or XMM register. Rows one through five list the registers that may correspond to the
value in the table. Again, the register used is determined by the opcode byte along with the operand-size attribute.
现在看TABLE 2-1的第七行,当字段被用于给出第二操作数位置的时候,这一行使用3-bit的Reg/Opcode字段,第二操作数必须是通用的,MMX技术,或者XMM寄存器,第一行到第五行列举了表中对应值的寄存器,再次强调,寄存器是被oprand-size大小的操作码字节决定的
If the instruction does not require a second operand, then the Reg/Opcode field may be used as an opcode extension.
This use is represented by the sixth row in the tables (labeled “/digit (Opcode)”). Note that values in row six
are represented in decimal form.
如果指令不要求第二操作数,Reg/Opcode字段也许会被作为一个操作码扩展,这一般会被表中的第六行代替,现在,第六行的值被十进制代替
The body of Table 2-1 and Table 2-2 (under the label “Value of ModR/M Byte (in Hexadecimal)”) contains a 32 by 8
array that presents all of 256 values of the ModR/M byte (in hexadecimal). Bits 3, 4 and 5 are specified by the
column of the table in which a byte resides. The row specifies bits 0, 1 and 2; and bits 6 and 7. The figure below
demonstrates interpretation of one table value.
Table 2-1 和 Table 2-2 包含了一个32*8的ModR/M字节的256个值,Table列由bit3 bit4 bit5指定,Table行由bit0 bit1 bit2(r/m)和bit6 bit7(Mod)指定,下面的图对Table值进行了说明



NOTES:     注意
1. The default segment register is SS for the effective addresses containing a BP index, DS for other effective addresses.
  默认段寄存器是SS, 有效地址包含一个BP变址, DS包含其他有效地址
2. The disp16 nomenclature denotes a 16-bit displacement that follows the ModR/M byte and that is added to the index.
16位偏移命名disp16为其标识,它跟在ModR/M字节后面,并且作为了一个索引
3. The disp8 nomenclature denotes an 8-bit displacement that follows the ModR/M byte and that is sign-extended and added to the
index.
8位偏移量命名disp8为其标识,它跟在ModR/M字节后面,并且可以是符号扩展和索引

NOTES:
1. The [--][--] nomenclature means a SIB follows the ModR/M byte.
[--][--]代表跟在ModR/M字节后面的SIB字节
2. The disp32 nomenclature denotes a 32-bit displacement that follows the ModR/M byte (or the SIB byte if one is present) and that is
added to the index.
32位偏移量命名为别名disp32,它跟在ModR/M或者SIB字节后面(如果只有一个村庄), 并且也是一个索引
3. The disp8 nomenclature denotes an 8-bit displacement that follows the ModR/M byte (or the SIB byte if one is present) and that is
sign-extended and added to the index.
8位偏移量命名disp8为其标识,它跟在ModR/M字节后面,并且可以是符号扩展和索引
Table 2-3 is organized to give 256 possible values of the SIB byte (in hexadecimal). General purpose registers used
as a base are indicated across the top of the table, along with corresponding values for the SIB byte’s base field.
Table rows in the body of the table indicate the register used as the index (SIB byte bits 3, 4 and 5) and the scaling
factor (determined by SIB byte bits 6 and 7).
Table 2-3是一个有256位可能值的SIB字节,表的顶部的通用寄存器被用作base, 对应着SIB字节的base字段。表2-3被标记为寄存器的每一行用于作为index和比例因子


不翻译了,卷2主要讲的是指令集,对于我用处不大,算了,从明天



起,还是老老实实的去看卷3吧!


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